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features ? low-voltage and standard-voltage operation ?v cc = 1.7 to 5.5v ? internally organized 4096 x 8, 8192 x 8 ? 2-wire serial interface ? schmitt trigger, filtered inputs for noise suppression ? bi-directional data transfer protocol ? 1mhz (5.0v) and 400khz (1.8v compatibility) ? write protect pin for hardware data protection ? 32-byte page write mode (partial page writes allowed) ? self-timed write cycle (5ms max) ? high reliability ? endurance: 1 million write cycles ? data retention: 100 years ? lead-free/halogen-free devices ? 8-lead jedec soic, 8-lead tssop, 8-lead udfn, 8-lead xdfn, 5-lead sot23 and 8-ball vfbga ? die sales: wafer form, waffle pack and bumped wafers description the atmel ? at24c32d/64d provides 32,768-/65,536-bits of serial electrically eras- able and programmable read only memory (eeprom) organized as 4096/8192 words of 8-bits each. the device?s cascadable feature allows up to eight devices to share a common 2-wire bus. the device is optimized for use in many industrial and commer- cial applications where low power and low voltage operation are essential. the at24c32d/64d is available in space saving 8-lead jedec soic, 8-lead tssop, 8- lead udfn, 8-lead xdfn, 5-lead sot23 and 8-ball vfbga and is accessed via a 2- wire serial interface. in addition, the entire family operates from 1.7v to 5.5v. v cc wp scl sda a0 a1 a2 gnd 4 3 2 1 5 6 7 8 8-lead udfn bottom view a0 a1 a2 gnd 1 2 3 4 8 7 6 5 8-lead soic v cc wp scl sda scl gnd sda 1 2 3 5 4 5-lead sot23 wp v cc 8-lead tssop 1 2 3 4 8 7 6 5 a0 a1 a2 gnd v cc wp scl sda v cc wp scl sda a0 a1 a2 gnd 1 2 3 4 8 7 6 5 8-ball vfbga bottom view v cc wp scl sda a0 a1 a2 gnd 4 3 2 1 5 6 7 8 8-lead xdfn bottom view 2-wire serial electrically erasable and programmable read-only memory 32k (4096 x 8) 64k (8192 x 8) atmel at24c32d atmel at24c64d 8717b?seepr?6/10 2-wire, 32k serial e 2 prom note: for use of 5-lead sot23, the software a2, a1, and a0 bits in the device address word must be set to zero to properly communicate table 0-1. pin configurations pin name function a0 - a2 address inputs sda serial data scl serial clock input wp write protect
2 8717b?seepr?6/10 atmel at24c32d/64d 1. absolute maximum ratings* figure 1-1. block diagram operating temperature ............................... -55 to +125 ? c *notice: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. storage temperature .................................. -65 to +150 ? c voltage on any pin with respect to ground................................. -1.0 to +7.0v maximum operating voltage.................................... 6.25v dc output current .................................................. 5.0ma start stop logic vcc gnd wp scl sda a 2 a 1 a 0 serial control logic en h.v. pump/timing eeprom data recovery serial mux x dec d out /ack logic comp load inc data wo r d addr/counter y dec r/w d out d in load device address comparator
3 8717b?seepr?6/10 atmel at24c32d/64d 2. pin description serial clock (scl): the scl input is used to positive edge clock data into each eeprom device and negative edge clock data out of each device. serial data (sda): the sda pin is bidirectional for serial data transfer. this pin is open-drain driven and may be wire-ored with any number of other open-drain or open collector devices. device/addresses (a2, a1, a0): the a2, a1 and a0 pins are device address inputs that are hard wired or left not connected for hardware compatibility with other atmel ? at24cxx devices. when the pins are hardwired, as many as eight 32k/64k devices may be addressed on a single bus system (device addressing is discussed in detail under the device addressing section). if the pins are left floating, the a2, a1 and a0 pins will be internally pulled down to gnd if the capacitive coupling to the circuit board v cc plane is <3pf. if coupling is >3pf, atmel recommends connecting the address pins to gnd. write protect (wp): the write protect input, when connected to gnd, allows normal write operations. when wp is connected high to v cc , all write operations to the memory are inhibited. if the pin is left floating, the wp pin will be internally pulled down to gnd if the capacitive coupling to the circuit board v cc plane is <3pf. if coupling is >3pf, atmel recommends connecting the pin to gnd.
4 8717b?seepr?6/10 atmel at24c32d/64d 3. memory organization atmel at24c32d/64d, 32/64k serial eeprom: the 32k/64k is internally organized as 128/256 pages of 32- bytes each. random word addressing requires a 12-/13-bit data word address. table 3-1. pin capacitance (1) note: 1. this parameter is characterized and is not 100% tested table 3-2. dc characteristics note: 1. v il min and v ih max are reference only and are not tested applicable over recommended operating range from t a =25 ? c, f = 1.0mhz, v cc = +1.7v to 5.5v symbol test condition max units conditions c i/o input/output capacitance (sda) 8 pf v i/o =0v c in input capacitance (a0, a1, a2, scl) 6 pf v in =0v applicable over recommended operating range from: t ai = -40 to +85 ? c, v cc = +1.7v to +5.5v (unless otherwise noted) symbol parameter test condition min typ max units v cc1 supply voltage 1.7 5.5 v i cc1 supply current v cc = 5.0v read at 400khz 0.4 1.0 ma i cc2 supply current v cc = 5.0v write at 400khz 2.0 3.0 ma i sb1 standby current (+1.7v option) v cc = 1.7v v in =v cc or v ss 1.0 a v cc = 5.5v 6.0 a i li input leakage current v cc = 5.0v v in =v cc or v ss 0.10 3.0 a i lo output leakage current v cc = 5.0v v out =v cc or v ss 0.05 3.0 a v il input low level (1) ? 0.6 v cc x 0.3 v v ih input high level (1) v cc x 0.7 v cc + 0.5 v v ol2 output low level v cc = 3.0v i ol = 2.1ma 0.4 v v ol1 output low level v cc = 1.7v i ol = 0.15ma 0.2 v
5 8717b?seepr?6/10 atmel at24c32d/64d table 3-3. ac characteristics notes: 1. this parameter is ensured by characterization 2. ac measurement conditions: r l (connects to v cc ): 1.3k ? (2.5v, 5.0v), 10k ? (1.7v) input pulse voltages: 0.3 v cc to 0.7 v cc input rise and fall times: ? 50ns input and output timing reference voltages: 0.5 v cc applicable over recommended operating range from t ai = -40 ? cto+85 ? c, v cc = +1.7v to +5.5v, c l = 1 ttl gate and 100pf (unless otherwise noted) symbol parameter 1.7v 5.0v min max min max units f scl clock frequency, scl 400 1000 khz t low clock pulse width low 1.3 0.4 s t high clock pulse width high 0.6 0.4 s t i noise suppression time (1) 100 50 ns t aa clock low to data out valid 0.05 0.9 0.05 0.55 s t buf time the bus must be free before a new transmission can start (1) 1.3 0.5 s t hd.sta start hold time 0.6 0.25 s t su.sta start set-up time 0.6 0.25 s t hd.dat data in hold time 0 0 s t su.dat data in set-up time 100 100 ns t r inputs rise time (1) 0.3 0.3 s t f inputs fall time (1) 300 100 ns t su.sto stop set-up time 0.6 0.25 s t dh data out hold time 50 50 ns t wr write cycle time 5 5 ms endurance (1) 25c, page mode, 3.3v 1,000,000 write cycles
6 8717b?seepr?6/10 atmel at24c32d/64d 4. device operation clock and data transitions: the sda pin is normally pulled high with an external device. data on the sda pin may change only during scl low time periods (refer to ?data validity? diagram). data changes during scl high periods will indicate a start or stop condition as defined below. start condition: a high-to-low transition of sda with scl high is a start condition which must precede any other command (refer to ?start and stop definition? diagram). stop condition: a low-to-high transition of sda with scl high is a stop condition. after a read sequence, the stop command will place the eeprom in a standby power mode (refer to ?start and stop definition? diagram). acknowledge: all addresses and data words are serially transmitted to and from the eeprom in 8-bit words. the eeprom sends a zero during the ninth clock cycle to acknowledge that it has received each word. standby mode: the atmel ? at24c32d/64d features a low power standby mode which is enabled: ? upon power-up ? after the receipt of the stop bit and the completion of any internal operations. software reset: after an interruption in protocol, power loss or system reset, and 2-wire part can be protocol reset by following these steps: ? create a start bit condition ? clock nine cycles ? create another start bit followed by stop bit condition as shown below. the device is ready for next communication after above steps have been completed. figure 4-1. software reset start bit stop bit start bit dummy clock cycles scl sda 123 89
7 8717b?seepr?6/10 atmel at24c32d/64d figure 4-2. bus timing scl: serial clock, sda: serial data i/o figure 4-3. write cycle timing scl: serial clock, sda: serial data i/o notes: 1. the write cycle time t wr is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle scl sda in sda out t f t high t low t low t r t aa t dh t buf t su.sto t su.dat t hd.dat t hd.sta t su.sta scl sda t wr (1) stop condition start condition wordn ack 8th bit
8 8717b?seepr?6/10 atmel at24c32d/64d figure 4-4. data validity figure 4-5. start and stop definition figure 4-6. output acknowledge sda scl data stable data stable data change sda scl start stop scl data i n data out start acknowledge 9 8 1
9 8717b?seepr?6/10 atmel at24c32d/64d 5. device addressing the 32k/64k eeprom requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (see figure 7-1 on page 10 ). the device address word consists of a mandatory one, zero sequence for the first four most significant bits as shown. this is common to all 2-wire eeprom devices. the 32k/64k uses the three device address bits a2, a1, a0 to allow as many as eight devices on the same bus. these bits must compare to their corresponding hardwired input pins. the a2, a1, and a0 pins use an internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float. the eighth bit of the device address is the read/write operation select bit. a read operation is initiated if this bit is high and a write operation is initiated if this bit is low. upon a compare of the device address, the eeprom will output a zero. if a compare is not made, the device will return to standby state. data security: the atmel ? at24c32d/64d has a hardware data protection scheme that allows the user to write protect the entire memory when the wp pin is at v cc . 6. write operations byte write: a write operation requires two 8-bit data word addresses following the device address word and acknowledgment. upon receipt of this address, the eeprom will again respond with a zero and then clock in the first 8-bit data word. following receipt of the 8-bit data word, the eeprom will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. at this time the eeprom enters an internally-timed write cycle, t wr , to the nonvolatile memory. all inputs are disabled during this write cycle and the eeprom will not respond until the write is complete (see figure 7-2 on page 10 ). page write: the 32k/64k eeprom is capable of 32-byte page writes. a page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. instead, after the eeprom acknowledges receipt of the first data word, the microcontroller can transmit up to 31 more data words. the eeprom will respond with a zero after each data word received. the microcontroller must terminate the page write sequence with a stop condition (see figure 7-3 on page 11 ). the data word address lower five bits are internally incremented following the receipt of each data word. the higher data word address bits are not incremented, retaining the memory page row location. when the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. if more than 32 data words are transmitted to the eeprom, the data word address will ?roll over? and previous data will be overwritten. acknowledge polling: once the internally-timed write cycle has started and the eeprom inputs are disabled, acknowledge polling can be initiated. this involves sending a start condition followed by the device address word. the read/write bit is representative of the operation desired. only if the internal write cycle has completed will the eeprom respond with a zero, allowing the read or write sequence to continue.
10 8717b?seepr?6/10 atmel at24c32d/64d 7. read operations read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. there are three read operations: current address read, random address read and sequential read. current address read: the internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. this address stays valid between operations as long as the chip power is maintained. the address ?roll over? during read is from the last byte of the last memory page, to the first byte of the first page. the address ?roll over? during write is from the last byte of the current page to the first byte of the same page. once the device address with the read/write select bit set to one is clocked in and acknowledged by the eeprom, the current address data word is serially clocked out. the microcontroller does not respond with an input zero but does generate a following stop condition (see figure 7-4 on page 11 ). random read: a random read requires a ?dummy? byte write sequence to load in the data word address. once the device address word and data word address are clocked in and acknowledged by the eeprom, the microcontroller must generate another start condition. t he microcontroller now initiates a current address read by sending a device address with the read/write select bit high. the eeprom acknowledges the device address and serially clocks out the data word. the microcontroller does not respond with a zero but does generate a following stop condition (see figure 7-5 on page 11 ). sequential read: sequential reads are initiated by either a current address read or a random address read. after the microcontroller receives a data word, it responds with an acknowledge. as long as the eeprom receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. when the memory address limit is reached, the data word address will ?roll over? and the sequential read will continue. the sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condition (see figure 7-6 on page 11 ). figure 7-1. device address figure 7-2. byte write notes: 1. * = don't care bits 2. t = don't care bit for atmel at24c32d msb lsb 1 0 1 0 a 2 a 1 a 0 r/w s t a r t w r i t e s t o p device address first word address second word address data sda line m s b l s b a c k r / w m s b a c k a c k a c k l s b t
11 8717b?seepr?6/10 atmel at24c32d/64d figure 7-3. page write notes: 1. * = don?t care bits 2. t = don?t care bit for atmel at24c32d figure 7-4. current address read figure 7-5. random read notes: 1. * = don?t care bits figure 7-6. sequential read t sda line s t a r t w r i t e device address first word address (n) second word address (n) data (n) data (n + x) m s b l s b a c k r / w a c k a c k a c k a c k s t o p sda line s t a r t device address r e a d s t o p m s b l s b a c k r / w n o a c k data sda line s t a r t s t a r t w r i t e device address device address 1st, 2nd word address n r e a d s t o p m s b l s b a c k r / w n o a c k data n dummy write a c k a c k sda line device address r e a d a c k a c k a c k s t o p a c k r / w n o a c k data n data n + 1 data n + 2 data n + 3
12 8717b?seepr?6/10 atmel at24c32d/64d 8. ordering code detail atmel designator product family device revision shipping carrier option package device grade or wafer/die thickness package option device density 32 = 32k 64 = 64k b or blank = bulk (tubes) t= tape and reel operating voltage m = 1.7v to 5.5v h = green, nipdau lead finish industrial temperature range (-40c to +85c) u = green, matte sn lead finish industrial temperature range (-40c to +85c) 11= 11mil wafer thickness ss = jedec soic x = tssop ma = udfn me = xdfn st = sot23 c = vfbga wwu = wafer unsawn wdt = die in tape and reel at24c32d-sshm-b
13 8717b?seepr?6/10 atmel at24c32d/64d 9. part markings 9.1 atmel at24c32d atmel at24c32d-sshm atmel at24c32d-xhm atmel at24c32d-mahm | seal week | | | |---|---|---|---|---|---|---|---| a t m l h y w w |---|---|---|---|---|---|---|---| 3 2 d m @ |---|---|---|---|---|---|---|---| * lot number |---|---|---|---|---|---|---|---| | pin 1 indicator (dot) top mark seal year y = seal year 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015 @ = country of assembly bottom mark no bottom mark ww = seal week 02 = week 2 04 = week 4 :: : :::: : :: : :::: :: 50 = week 50 52 = week 52 pin 1 indicator (dot) | |---|---|---|---|---|---| * a t h y w w |---|---|---|---|---|---| 3 2 d m @ |---|---|---|---|---|---| atmel lot number |---|---|---|---|---|---|---| top mark y = seal year 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015 @ = country of assembly no bottom mark ww = seal week 02 = week 2 04 = week 4 :: : :::: : :: : :::: :: 50 = week 50 52 = week 52 |---|---|---| 3 2 d |---|---|---| h m @ |---|---|---| y t c |---|---|---| * | pin 1 indicator (dot) top mark y = year of assembly tc= trace code (atmel lot number to coorespond with trace code log book) y = seal year 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015
14 8717b?seepr?6/10 atmel at24c32d/64d atmel at24c32d-mehm atmel at24c32d-stum atmel at24c32d-cum |---|---|---| 3 2 d |---|---|---| y t c |---|---|---| * | pin 1 indicator (dot) top mark y = year of assembly tc= trace code (atmel lot number to coorespond with trace code log book) y = seal year 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015 top mark |---|---|---|---|---| line 1 --------> b d m w u |---|---|---|---|---| * | pin 1 indicator (dot) bottom mark |---|---|---|---| y m t c |---|---|---|---| bd= device code m = operating voltage w = write protect feature u = material set y = one digit year code m = seal month tc= trace code top mark |---|---|---|---| line 1 -------> 3 2 d u |---|---|---|---| y m t c | <--pin 1 this corner y = one digit year code 8: 2008 1: 2011 9: 2009 2: 2012 0: 2010 3: 2013 m = seal month (use alpha designator a-l) a = january b = february " " """""""" j = october k = november l = december tc= trace code (atmel lot number to coorespond with trace code log book) (e.g. xx = aa, ab... yz, zz)
15 8717b?seepr?6/10 atmel at24c32d/64d 9.2 atmel at24c64d atmel at24c64d-sshm atmel at24c64d-xhm atmel at24c64d-mahm | seal week | | | |---|---|---|---|---|---|---|---| a t m l h y w w |---|---|---|---|---|---|---|---| 6 4 d m @ |---|---|---|---|---|---|---|---| * lot number |---|---|---|---|---|---|---|---| | pin 1 indicator (dot) top mark seal year y = seal year 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015 @ = country of assembly bottom mark no bottom mark ww = seal week 02 = week 2 04 = week 4 :: : :::: : :: : :::: :: 50 = week 50 52 = week 52 pin 1 indicator (dot) | |---|---|---|---|---|---| * a t h y w w |---|---|---|---|---|---| 6 4 d m @ |---|---|---|---|---|---| atmel lot number |---|---|---|---|---|---|---| top mark y = seal year 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015 @ = country of assembly no bottom mark ww = seal week 02 = week 2 04 = week 4 :: : :::: : :: : :::: :: 50 = week 50 52 = week 52 |---|---|---| 6 4 d |---|---|---| h m @ |---|---|---| y t c |---|---|---| * | pin 1 indicator (dot) top mark y = year of assembly tc= trace code (atmel lot number to coorespond with trace code log book) y = seal year 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015
16 8717b?seepr?6/10 atmel at24c32d/64d atmel at24c64d-mehm atmel at24c64d-cum |---|---|---| 6 4 d |---|---|---| y t c |---|---|---| * | pin 1 indicator (dot) top mark y = year of assembly tc= trace code (atmel lot number to coorespond with trace code log book) y = seal year 8: 2008 2: 2012 9: 2009 3: 2013 0: 2010 4: 2014 1: 2011 5: 2015 top mark |---|---|---|---| line 1 -------> 6 4 d u |---|---|---|---| y m t c | <--pin 1 this corner y = one digit year code 8: 2008 1: 2011 9: 2009 2: 2012 0: 2010 3: 2013 m = seal month (use alpha designator a-l) a = january b = february " " """""""" j = october k = november l = december tc= trace code (atmel lot number to coorespond with trace code log book) (e.g. xx = aa, ab... yz, zz)
17 8717b?seepr?6/10 atmel at24c32d/64d 10. ordering codes atmel at24c32d ordering information notes: 1. ?-b? denotes bulk delivery 2. ?-t? denotes tape and reel delivery. soic = 4k/reel. tssop, udfn, xdfn, sot23 and vfbga = 5k/reel 3. for wafer sales, please contact atmel sales ordering code voltage package operation range at24c32d-sshm-b (1) (nipdau lead finish) at24c32d-sshm-t (2) (nipdau lead finish) at24c32d-xhm-b (1) (nipdau lead finish) at24c32d-xhm-t (2) (nipdau lead finish) at24c32d-mahm-t (2) (nipdau lead finish) AT24C32D-MEHM-T (2) (nipdau lead finish) at24c32d-stum-t (2) at24c32d-cum-t (2) 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 8s1 8s1 8a2 8a2 8y6 8me1 5ts1 8u3-1 lead-free/halogen-free industrial temperature (-40 ? cto+85 ? c) at24c32d-wwu11m (3) 1.7 to 5.5 die sale industrial temperature (-40 ? cto+85 ? c) package type 8s1 8-lead, 0.150" wide, plastic gull wing small outline (jedec soic) 8a2 8-lead, 4.4mm body, plastic, thin shrink small outline package (tssop) 8y6 8-lead, 2.00mm x 3.00mm body, 0.50mm pitch, ultra thin dual no lead package (udfn) 8me1 8-lead, 1.80mm x 2.20mm body, (xdfn) 5ts1 5-lead, 1.60mm body, plastic thin shrink small outline package (sot-23) 8u3-1 8-ball, 1.50mm x 2.00mm body, 0.50mm pitch, small die ball grid array (vfbga)
18 8717b?seepr?6/10 atmel at24c32d/64d atmel at24c64d ordering information notes: 1. ?-b? denotes bulk delivery 2. ?-t? denotes tape and reel delivery. soic = 4k/reel. tssop, udfn, xdfn, sot23 and vfbga = 5k/reel 3. for wafer sales, please contact atmel sales ordering code voltage package operation range at24c64d-sshm-b (1) (nipdau lead finish) at24c64d-sshm-t (2) (nipdau lead finish) at24c64d-xhm-b (1) (nipdau lead finish) at24c64d-xhm-t (2) (nipdau lead finish) at24c64d-mahm-t (2) (nipdau lead finish) at24c64d-mehm-t (2) (nipdau lead finish) at24c64d-cum-t (2) 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 1.7 to 5.5 8s1 8s1 8a2 8a2 8y6 8me1 8u3-1 lead-free/halogen-free industrial temperature (-40 ? cto+85 ? c) at24c64d-wwu11m (3) 1.7 to 5.5 die sale industrial temperature (-40 ? cto+85 ? c) package type 8s1 8-lead, 0.150" wide, plastic gull wing small outline (jedec soic) 8a2 8-lead, 4.4mm body, plastic, thin shrink small outline package (tssop) 8y6 8-lead, 2.00mm x 3.00mm body, 0.50mm pitch, ultra thin dual no lead package (udfn) 8me1 8-lead, 1.80mm x 2.20mm body, (xdfn) 8u3-1 8-ball, 1.50mm x 2.00mm body, 0.50mm pitch, small die ball grid array (vfbga)
19 8717b?seepr?6/10 atmel at24c32d/64d 11. packaging information 8s1 ? jedec soic package drawing contact: packagedrawings@atmel.com drawing no. rev. title gpc common dimensions (unit of measure = mm) symbol min nom max note a1 0.10 ? 0.25 a 1.35 ? 1.75 b 0.31 ? 0.51 c 0.17 ? 0.25 d 4.80 ? 5.05 e1 3.81 ? 3.99 e 5.79 ? 6.20 e 1.27 bsc l 0.40 ? 1.27 ? ? 0 ? 8 ? ? e e 1 1 n n top view t o p v i e w c c e1 e 1 end view a a b b l l a1 a 1 e e d d side view s i d e v i e w 8s1 f 5/19/10 notes: this drawing is for general information only. refer to jedec drawing ms-012, variation aa for proper dimensions, tolerances, datums, etc. 8s1, 8-lead (0.150? wide body), plastic gull wing small outline (jedec soic) swb
20 8717b?seepr?6/10 atmel at24c32d/64d 8a2 ? tssop package drawing contact: packagedrawings@atmel.com drawing no. rev. title gpc common dimensions (unit of measure = mm) symbol min nom max note d 2.90 3.00 3.10 2, 5 e 6.40 bsc e1 4.30 4.40 4.50 3, 5 a ? ? 1.20 a2 0.80 1.00 1.05 b 0.19 ? 0.30 4 e 0.65 bsc l 0.45 0.60 0.75 l1 1.00 ref side view end view top view a2 a l l1 d 1 2 3 e1 n b pin 1 indicator this corner e e notes: 1. this drawing is for general information only. refer to jedec drawing mo-153, variation aa, for proper dimensions, tolerances, datums, etc. 2. dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. dimension e1 does not include inter-lead flash or protrusions. inter-lead flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. dambar cannot be located on the lower radius of the foot. minimum space between protrusion and adjacent lead is 0.07mm. 5. dimension d and e1 to be determined at datum plane h. 8a2 e 5/19/10 8a2, 8-lead 4.4mm body, plastic thin shrink small outline package (tssop) tnr
21 8717b?seepr?6/10 atmel at24c32d/64d 8y6 ? mlp package drawing contact: packagedrawings@atmel.com drawing no. gpc rev. title 8y6 ynz e 11/21/08 8y6 , 8-lead, 2.0x3.0mm body, 0.50mm pitch, ultrathin mini-map, dual no lead package (sawn)(udfn) common dimensions (unit of measure = mm) symbol min nom max note 1.40 ? ? 0.00 ? 0.20 0.20 d e d2 e2 a a1 a2 a3 l e b 2.00 bsc 3.00 bsc 1.50 ? ? 0.02 ? 0.20 ref 0.30 0.50 bsc 0.25 1.60 1.40 0.60 0.05 0.55 0.40 0.30 2 a2 pin 1 index area a3 d e b (8x) pin 1 id a1 a l (8x) e (6x) 1.50 ref. d2 e2 notes: 1. this drawing is for general information only. refer to jedec drawing mo-229, for proper dimensions, tolerances, datums, etc. 2. dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. if the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 3. soldering the large thermal pad is optional, but not recommended. no electrical connection is accomplished to the device through this pad, so if soldered it should be tied to ground
22 8717b?seepr?6/10 atmel at24c32d/64d 8me1 ? xdfn common dimensions (unit of measure = mm) symbol min nom max note package drawing contact: packagedrawings@atmel.com drawing no. rev. title gpc 8me1 a 8/3/09 8me1, 8-lead (1.80 x 2.20mm body) extra thin dfn (xdfn) dtp ? 0.00 1.70 2.10 0.15 0.26 a a1 d e b e e1 l ? ? 1.80 2.20 0.20 0.40 typ 1.20 ref 0.30 0.40 0.05 1.90 2.30 0.25 0.35 bottom view top view side view 8 7 6 5 1 2 3 4 d e pin #1 id a1 a pin #1 id e1 b l e b 0.10 0.15
23 8717b?seepr?6/10 atmel at24c32d/64d 5ts1? sot-23 package drawing contact: packagedrawings@atmel.com drawing no. rev. title gpc notes: 1. dimensions d does not include mold flash, protrusions or gate burrs. mold flash protrusions or gate burrs shall not exceed 0.15mm per end. dimensions e1 does not include interlead flash or protrusion. interlead flasg or protrusion shall not exceed 0.15mm per side. 2. the package top may be smaller than the package bottom. dimensions d and e1 are deteremined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. 3. these dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 4. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.80mm total in excess of the ?b? dimension at maximum material condition. the dambar cannot be located on the lower radius of the foot. minimum space between protrusion and an adjacent lead shall not be less than 0.07mm. 5. this drawing is for general information only. refer to jedec drawing mo-193, variation ab for additional information. 5ts1 b 11/05/08 5ts1 , 5-lead, 1.60mm body, plastic thin shrink small outline package (shrink sot) tsz end view top view side view common dimensions (unit of measure = mm) symbol min nom max note ? 0.00 0.70 0.08 0.30 a a1 a2 c d e e1 l1 e e1 b ? ? 0.90 ? 2.90 bsc 2.80 bsc 1.60 bsc 0.60 ref 0.95 bsc 1.90 bsc ? 1.10 0.10 1.00 0.20 0.50 3 1, 2 1, 2 1, 2 3, 4 e1 e e1 54 2 3 1 l c c l1 a b e a2 a1 d seating plane
24 8717b?seepr?6/10 atmel at24c32d/64d 8u3-1 ? vfbga common dimensions (unit of measure = mm) symbol min nom max note package drawing contact: packagedrawings@atmel.com drawing no. rev. title po8u3-1 c 9/19/07 8u3-1, 8-ball, 1.50 x 2.00mm body, 0.50mm pitch, vfbga package (dbga2) 0.73 0.09 0.40 0.20 a a1 a2 b d e e e1 d d1 0.79 0.14 0.45 0.25 1.50 bsc 2.00 bsc 0.50 bsc 0.25 ref 1.00 bsc 0.25 ref 0.85 0.19 0.50 0.30 2 top view end view notes: 1. this drawing is for general information only. 2. dimension ?b? is measured at maximum solder ball diameter. 3. solder ball composition shall be 95.5sn-4.0ag-.5cu e d pin 1 ball pad corner b 1. a 1 a a 2 8 7 6 5 1 2 3 4 bottom view (8 solder balls) pin 1 ball pad corner (d1) d (e1) e
25 8717b?seepr?6/10 atmel at24c32d/64d revision history doc. rev. date comments 5298b 6/2010 update 8a2 and 8s1 package drawings remove all pdip device package references add sot23 in feature and description list, pin configuration with note and package drawing 5298a 4/2010 initial document release
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